RISC-V Open-Source Chip Push Puts Strategy Over Capability
RISC-V Open-Source Chip Push Puts Strategy Over Capability
Executive Summary:
- The People’s Republic of China (PRC) is expanding its use of RISC-V, an open-source chip design standard, as well as its influence over the international nonprofit organization that manages it. This follows growing fears in recent years of being cut off from chips designed by Western industry leaders such as Arm and Intel.
- PRC firms are now creating RISC-V chips not just for consumer devices but for servers and data centers, even though they are less powerful than proprietary chips. The V100, launched in October and co-created by a state-backed entity, is billed as the first general-purpose chip fully compliant with RISC-V server standards.
- National-level policy documents have traditionally avoided discussing RISC-V directly, but in September, the 15th Five-Year Plan for the Electronic Information Manufacturing Industry announced calls to advance RISC-V research, development, and industrialization, and to develop RISC-V chips for artificial intelligence (AI).
- RISC-V brings clear benefits for self-reliance, and the chips can be adapted, including being optimized for military use cases. Analysts in the PRC worry, however, about a “glass ceiling” for the chips, and even the state IT substitution program has noted that the share of RISC-V chips it has used to replace foreign technology in government systems is “negligible.”
On October 19, Shenzhen-based chipmaker SpacemiT (进迭时空) and the state-backed XiangShan (香山) processor team launched the V100, a new 46-core server chip, at the sixth RISC-V Summit China. [1] Its makers bill it as the first general-purpose chip fully compliant with RISC-V server standards (21st Century Business Herald, October 19; Science and Technology Daily, October 20).
RISC-V is an open-source instruction set architecture (ISA), which is the language that processors run on. Unlike proprietary ISAs, such as Arm or Intel’s x86 that are used in almost all of the world’s computers and phones, anyone can use RISC-V without paying a license fee or requiring other permissions.
Arm and Intel processors, made by British and U.S. companies, must abide by licensing and export controls put in place by those countries’ governments. By comparison, RISC-V is mainly overseen by RISC-V International, a Switzerland-based nonprofit that avoids such vulnerabilities.
The recently unveiled server chip is representative of broader trends in the sector within the People’s Republic of China (PRC). Beijing initially began to view RISC-V as a way to counter the West’s technological hegemony and extend its structural power in emerging technologies in the mid-2010s (China Brief, December 15, 2023). Since then, it has encouraged its development through state-led policy support, starting at the city level and moving up to the national level. Although the chips’ capabilities remain behind those of Western rivals, they are increasingly being deployed in servers for data centers, not just embedded in consumer devices.
From City Halls to the Five-Year Plan
Since 2023, local-level support for RISC-V has been explicit, especially in first-tier cities like Shanghai, Beijing, and Shenzhen (China Brief, December 15, 2023). Beijing’s Economic-Technological Development Area aims for a RISC-V industry worth more than renminbi (RMB) 50 billion ($7 billion) by 2030, at which point the national market will reach around RMB 220 billion ($21 billion), according to some estimates (Beijing Municipal Government, January 3, 2025; China Daily, October 22).
National-level documents have tended instead to use the term “open source” to implicitly refer to RISC-V. In mid-September, however, the 15th Five-Year Plan for the Electronic Information Manufacturing Industry announced calls to “advance the research, development, and industrialization of RISC-V” (推进第五代精简指令集 (RISC-V) 研发与产业化), and to support RISC-V artificial intelligence (AI) and embedded system chips (Ministry of Information and Industry Technology, September 15). [2]
Server Ambitions, Smartphone-Class Silicon
RISC-V’s strength so far has been in cheaper control chips for appliances and cars, but newer chips signal data center servers as an emerging use case. The Chinese Academy of Sciences (CAS) calls the open-source XiangShan core the most powerful of its kind in the world (China Daily, March 26). Beyond the latest processor from SpacemiT and XiangShan, Alibaba now offers a server-class design, the C950, that it says performs on par with Apple’s M1 chip, which it released in 2020, on a standard performance test (The Register, March 25).
Engineers usually judge how well a core is designed via a two-step process. First, they run an industry-standard test, which times how long a processor takes to complete a set of tasks, and turns that time into a score. Second, they divide the score by the core’s clock speed, which is the number of steps it takes each second, measured in gigahertz (GHz). The result measures how much work a core does in each step (see Figure 1). On this metric, PRC progress is substantial: XiangShan’s cores have roughly doubled since 2021.
Figure 1: Per-clock Performance of Chinese RISC-V Cores, 2019–2026
- Chinese RISC-V
- US RISC-V
- Arm
- Intel / AMD (x86)
AReal-world speed of one core
Index, Nvidia Grace core = 100
BCores per chip
CMemory speed
GB/s
(Source: Compiled by the author from Chen et al., 2020; Wang et al., 2024; RISC-V Summit North America, 2025; The Register, March 25; SpacemiT, September 24, GitHub, accessed October 27)
CAS’s self-tested, most capable RSIC-V core, however, comes from a computer simulation—they are yet to run the tests on physical chips. In an independent test run on SpacemiT’s most recently commercially produced desktop and edge chip showed it as running slightly slower than the U.K.-designed Raspberry Pi 5 hobby computer, which was released in 2023 (CNX Software, January 23).
The speed that a core runs matters too, as a chip with a well-designed core may still lose out in the long term to a more basic chip whose core has a faster clock speed. Measured at the speeds they actually run, the best cores in the SpacemiT/XiangShan processor are well behind Nvidia’s leading Grace server processor, and those produced by Arm and Intel (see Figure 2). Alibaba’s C950, which it licenses to other chipmakers, comes close to or beats Grace based on the firm’s internal testing. This kind of performance may only be good enough to support local, small scale compute projects and edge platforms. [3]
Figure 2: Chinese RISC-V Cores Underperform Western Proprietary Competitors
(Source: Compiled by the author from Nvidia, January 20, 2023, October 14; Tenstorrent, December 4, 2025; RISC-V Summit North America, 2025; Substack/Chester Lam, March 3; The Register, March 25; SpacemiT, September 24; GitHub; HMC-Tech, accessed October 27; Intel; AMD, accessed November 3)
The gap is wider in advanced AI. RISC-V is a standard for general-purpose processors, and is not usually used for the graphics chips (GPUs) that run most complex AI models (Jon Peddie Research, December 29, 2025). By SpacemiT’s own ratings, its chip’s computing power is between 50–90 percent of Nvidia’s similarly priced Jetson Orin Nano Super, which is used in robots and drones. Its AI engine also falls short of the minimum Microsoft sets for “AI PCs” (see Figure 3). [4] RISC-V, therefore, does little to address Beijing’s lack of compute.
Figure 3: SpacemiT’s K3 Less Efficient and Capable Than Western Alternatives
AAI work per watt
Robots and drones: K3 vs Nvidia Jetson
BAI work per second
Laptop chips, in TOPS
Microsoft “AI PC” minimum (40 TOPS)
(Sources: Apple, May 7, 2024; AMD, June 2, 2024; Intel, October 10, 2024; Nvidia, January 16, 2025, accessed November 3; Microsoft, December 19, 2025; SpacemiT, September 24; Qualcomm, accessed November 3).
RISC-V Buys Assurance and Customization
RISC-V offers the PRC with two benefits: the assurance of sustainable access, and adaptability for military purposes, which would be risky use-cases for employing Western chips. The fear of being cut off from access to chips has been acute since Huawei learned in 2019 that its access to Arm’s designs could be suspended (BBC, May 22, 2019).
As an open-source architecture, RISC-V can be modified and tailored to user requirements. In some instances, however, this has allowed it to be adapted for military purposes. A team at Information Engineering University, an institution affiliated with the People’s Liberation Army, was able to customize command for data encryption to a small RISC-V chip, accelerating encryption by about seven times with only about two percent more circuitry. [5]
These benefits are another part of the reason why the PRC has pushed to deepen its influence over RISC-V at the international level. Chinese firms now hold half of the 24 top-tier memberships in RISC-V International (RISC-V, accessed November 3). U.S. firms are deepening their stake in the RISC-V ecosystem too. Nvidia said in July 2025 that its CUDA software, the backbone of AI computing, would support RISC-V processors, and Qualcomm bought the RISC-V server designer Ventana in December 2025 (The Register, July 21, 2025; Qualcomm, December 10, 2025).
Conclusion
Beijing continues to emphasize RISC-V to advance technological self-reliance and resilience. Although it is starting to use RISC-V chips in servers and data centers, the chips function at well below the capabilities of the most advanced processors. Analysts in the PRC have worried about a “glass ceiling” (玻璃天花板) for the chips, and even the state IT substitution program (信创) has noted that the share of RISC-V chips it has used to replace foreign technology in government systems is “negligible (微乎其微)” (Sina Finance, April 7). It is nevertheless too soon to dismiss the hype over the PRC’s RISC-V development.
RISC-V currently also enjoys support from U.S. companies. This makes the international standards that govern RISC-V an important battle ground in the competition to shape this arena of open-source technology. It remains unclear, however, whether the United States will seek to build a U.S.-led ISA ecosystem or discourage U.S. and allied firms from taking part in Chinese-led RISC-V projects. Neither option is cost-free, although if Washington does not take action, a key part of the semiconductor supply chain could end up being controlled by Beijing.
Notes
[1] A core is the part of a processor that reads and carries out software instructions.
[2] The plan was released by the Ministry of Industry and Information Technology (MIIT) and the National Development and Reform Commission, but grew out of work by eight agencies that drafted the country’s first national guidance on RISC-V in 2025 (Reuters, March 3, 2025).
[3] For Figure 2, panel A estimates the real speed of a single core by multiplying its points per gigahertz by the clock speed at which it actually ships, and shows the result relative to a core in Nvidia’s Grace server processor (set at 100). Intel and AMD do not publish comparable SPECint2006 figures, so their desktop cores are set equal to Arm’s Cortex-X925, which independent testing by Chips and Cheese found to be within the margin of error of the fastest AMD and Intel cores on the newer SPECint2017 test (Chips and Cheese, March 3). Panels B and C compare whole server chips. The first is the number of cores. Each core works on its own task, so more cores means more work at once. The second is memory speed, or bandwidth: how many gigabytes of data a chip can move to and from its memory each second. In large data-center jobs this is often the real limit, because even a fast core sits idle while it waits for data. The lower panels of Figure 2 compare other measures of performance for entire server chips. The V100 has 46 cores; Nvidia’s Grace has 72; and the top Intel and AMD server chips have 128–192. The V100 also moves data to and from memory at about half their speed. It draws far less power, however, at 120 watts, compared to about 250 for Grace and 500 for the Intel and AMD chips (GitHub, accessed October 27).
[4] Figure 3 measures AI performance in trillions of simple calculations per second (TOPS). Since AI models run on vast numbers of such calculations, higher TOPS values translate to faster AI. The left panel divides TOPS by the power a chip draws, in watts, to show energy efficiency, which matters most in battery-powered robots and drones. The right panel shows raw TOPS for laptop chips. Companies quote TOPS in different ways that can double or even quadruple the headline number, so the chart puts every chip on the same basis. Even if the SpacemiT processor reaches 30 TOPS, this is still short of Microsoft’s bar of 40. By The Register’s estimate, even Alibaba’s best design would roughly match Apple’s M1 (The Register, March 25).
[5] Zhang Xiaolei, Dai Zibin, Guo Pengfei, et al., “Design and Verification of a RISC-V-Based AES Cryptographic Acceleration Engine [基于RISC-V的AES密码加速引擎设计与验证],” Application of Electronic Technique [电子技术应用] 49, no. 2 (2023): 39–44. Results are from FPGA prototypes built on the open-source Hummingbird E203 core.